1. Technical Field
The present invention relates to fractional-N frequency synthesis, more particularly to methods and systems for fractional-N charge compensation through the use of a variable charge pump system.
2. Background Art
Frequency synthesizers play a key role in a variety of technology industries. For example, they are implemented in numerous communication and computing applications. These applications include electronic devices such as AM/FM radios, digital cellular phones and spread spectrum receivers as well as computing devices. A frequency synthesizer conventionally utilizes a phase-lock loop circuit (PLL) and a divider coupled to a voltage controlled oscillator to reliably produce frequencies that are multiples of a reference input source.
In the design of a PLL circuit, two opposing engineering parameters need to be considered. The first is channel spacing. This parameter reflects the ability to achieve discrete frequencies that are multiples of a comparison frequency, as dictated by the following equation: EQU f.sub.VCO =N.sub.VCO .times.f.sub.Comp (1)
where f.sub.VCO is the frequency of the voltage controlled oscillator (VCO), N.sub.VCO is the divide ratio of the VCO divider, and f.sub.Comp is the comparison frequency.
A small channel spacing permits many channels to occupy a given bandwidth and is, thus, desirable. This can be attained through the use of a low comparison frequency. Small channel spacing, however, compromises the second parameter, that of channel switching time. Channel switching time represents the ability of the PLL circuit to switch from a given channel (VCO frequency) to another channel (i.e., frequency). The switching of channels results from modifying the division ratio. Other parameters that impact switching time include VCO gain, charge pump current, and loop filter characteristics. A small channel spacing necessarily results in a slower channel switching time. For a faster switching time as well as lower noise, a high comparison frequency is required, but yields large channel spacings.
Consequently, a number of different methods have been developed to address the above problem. One known method implements a variable comparison frequency. Under this approach, the divide ratios of a reference divider and a VCO divider are manipulated to create a very high comparison frequency. Afterwards, the regular divide ratios are used to fine tune the actual frequency. A second method is to dynamically change parameters of the Low Pass Filter (LPF) and the charge pump. A third type of method, which is the subject of the present invention, is to use a non-integer divider (i.e., fractional-N PLL).
In a general fractional-N technique, the comparison frequency can be made high (which provides, for example, better phase resolution and thus yields a faster switching time) while maintaining the same VCO frequency (which preserves the channel spacing). This can be achieved because the multiplier N.sub.VCO of equation (1) is a fractional number. In terms of actual implementation, the frequency of the oscillator output signal is divided periodically with mutually different integers (e.g., N, then N+1), such that the frequency, is on an average, divided by a value equal to an integer N plus or minus a numerical fraction whose absolute value is smaller than one.
The exact divide ratio is not used. Instead, integer divisors that are one below and one above are utilized so that, on average over a time period, a fractional divide ratio results. One side effect is that spectral peaks emerge at the channel spacings. Smaller loop filter bandwidth reduces the peaks, but does not eliminate them. These peaks at the spacings cause interference with the neighboring channels. Fractional-N compensation provides an effective way to attenuate these undesired peaks. With this scheme, small channel spacing can be obtained while the switching speed is increased.
FIG. 1 shows a conventional fractional-N frequency synthesizer implemented in an integrated circuit employing fractional-N compensation. The reference source 101 outputs a reference signal to a reference divider 103 that produces a divided reference signal to a phase comparator 105. The phase comparator 105 detects the phase difference between the frequency of the divided reference signal (also called comparison frequency) and the frequency of the signal from a Voltage Controlled Oscillator (VCO) divider 109. The input to the VCO divider 109 originates from a VCO 113. The VCO divider 109 drives an accumulator 111 that, upon an overflow, outputs a signal to the VCO divider 109, which then divides by N+1. The information supplied by VCO divider 109 to the accumulator 111 represents the numerical divide ratio the VCO divider 109 is using so that the accumulator 111 may cause a compensation charge pump 117 to appropriately compensate in proportion to the accumulator content. The output of the phase comparator 105 is the phase error between the comparison frequency and the divided VCO frequency; this phase error is fed into a main charge pump 107, which provides a current pulse that is proportional to the phase error. The compensated current (i.e., error signal) is filtered via a low-pass filter (LPF) 115 and then applied to the control input of the VCO 113 to produce an output signal that more accurately tracks the phase of the comparison signal. The VCO output signal is then fed back into the VCO 113 to align the divided VCO frequency to the comparison frequency. The process continues until a zero phase error is attained, whereby the two frequencies are properly aligned.
FIG. 2 is a timing diagram that illustrates the concepts involved in fractional-N compensation. Fractional-N compensation can be effectively performed because a number of system parameters are known, and therefore can be used to mitigate the undesired effects of the PLL circuit. Comparison signal 201 is shown in the time domain. Main N VCO cycles 203 correspond to the VCO divider 109, which divides by N and then N+1 so that the average yields a fractional N. Because the divide ratio is non-exact, the edges of the comparison signal 201 and the Main N VCO cycles 203 do not coincide, as is evident by the phase comparator output 205.
In response to the output of accumulator 111, as influenced by the phase comparator output 205, the compensation charge pump 117 supplies an opposite current to compensate for the phase error (i.e., delay) as shown by the fractional compensation current graph 209. The content of the accumulator counter 207 provides information on the phase error and is used to produce the compensation current. In this example, the fractional ratio is five and the fractional accumulator value is two; the fractional accumulator value may be set to any integer number between zero and the fractional ratio, depending on the application. The accumulator counter content 207 is proportional to the fractional phase ripple caused by the fractional division.
The amount of error is known and can be stored and tracked through the use of the accumulator counter 111 Graph 211 illustrates a signal which is the sum of the outputs of the main charge pump 107 and of the compensation charge pump 117. Note that graph 211 represents one sum signal despite the scale being different above and below the horizontal axis. For proper fractional-N compensation, the area of the fractional compensation current pulse must be equal to the area of the charge pump ripple output.
The undesired current from the main charge pump creates unwanted peaks as discussed earlier, and thus, should be minimized. The charge from the charge pump (i.e., fractional noise) is governed by the following equation : EQU Q=I.sub.pump .times.FRD.times.(t.sub.VCO /Frac.sub.-- ratio)(2)
where Q is the total charge, I.sub.pump is the current outputted from the charge pump, FRD is the accumulator counter value, t.sub.VCO is the VCO period, and Frac.sub.-- ratio is the fractional ratio. Because these parameters are known, the charge Q can be readily computed. Therefore, the undesired charge Q can be offset by providing a -Q charge in the LPF 115 via an additional charge pump (i.e., compensation pump).
The generation of the -Q charge is the crux of the problem in the fractional-N compensation scheme. One technique in the prior art provides the compensation charge in accordance with the following general equation: EQU Q.sub.comp =-I.sub.comp .times.Comp.sub.-- pulse.sub.-- length.times.FRD(3)
where Q.sub.comp denotes the compensation charge generated by the compensation pump; I.sub.comp is the current produced by a unity compensation pump (i.e., FRD is 1); FRD is the accumulator counter value; and Comp.sub.-- pulse.sub.-- length is the duration of the compensation pulse. FRD is present in Equation (3) to scale Q.sub.comp to the total compensation current, Icomp.times.FRD.
One known technique utilizes a Comp.sub.-- pulse.sub.-- length of 2.times.T.sub.XTAL (where T.sub.XTAL is the crystal period). Equating Q with Q.sub.comp yields the following: ##EQU1## Expression (4c) constitutes the final mathematical reduction, which indicates that the compensation scheme relies primarily on these parameters (where FRD is the accumulator value at a particular point in time; and Frac.sub.-- ratio is the fractional ratio value).
The expression reveals the existence of both matching and tuning problems, resulting in many drawbacks associated with this conventional technique of compensation. The expression (4c) specifically reveals that significant tuning of I.sub.comp is needed, with respect to I.sub.pump, FRD, T.sub.XTAL, and T.sub.VCO. The matching problem is mainly because the amplitudes of I.sub.pump and I.sub.comp are significantly disparate; I.sub.pump has a large amplitude (in the order of mA), whereas, I.sub.comp has a much smaller amplitude (in the order of .mu.A). Such disparity arises because Comp.sub.-- pulse.sub.-- length is typically significantly longer than T.sub.VCO /Frac.sub.-- ratio (e.g., 200 ns versus 0.1 ns). The matching of the two currents in terms of tuning voltages and temperature variations is a difficult task. Various prior methods of matching include, for example, external current tuning, and software control of the charge pumps.
However, these matching approaches are inconvenient in that different applications require manual readjustment of a multitude of parameters. Because of the amplitude level disparity, the components that are used to generate I.sub.pump and I.sub.comp are different. A PNP transistor may be utilized to supply I.sub.pump because it can better handle large amplitude currents and concomitant speed requirements. In contrast, I.sub.comp uses a PMOS transistor, which can accommodate the much smaller signal levels with reduced area and increased accuracy and speed.
A technique has been developed to attempt to mitigate the recognized problems related to matching component behavior and timing, which have plagued past implementations. This technique, for example, involves generating the compensation charge using the following equation: EQU Q.sub.comp =-I.sub.comp .times.t.sub.VCO .times.64 (5)
where Q.sub.comp denotes the compensation charge generated by the compensation pump; I.sub.comp is the current produced by the compensation pump; and t.sub.VCO is the VCO period. The resultant expression from equating Q to Q.sub.comp is as follows: EQU I.sub.pump .times.FRD/Frac.sub.-- ratio =I.sub.comp .times.64(6)
This expression indicates that the variability is reduced because t.sub.VCO and t.sub.XTAL have been removed from the equation.
Comp.sub.-- pulse.sub.-- length is largely dictated by the particular application. For example, instead of 64, 128 can be used for some applications. With 64, assuming FRD is 1 and a Frac.sub.-- ratio of 5, the current ratio (I.sub.pump /I.sub.comp) is 320, which still poses issues with matching due to the amplitude disparity.
Although the above technique eliminates some amplitude disparity, the drawbacks associated with timing and component matching remain. Notably, applications requiring higher frequencies encounter more effects of the mismatch problems.
Moreover, because the fractional compensation pump is required to compensate for the main pump according to the phase error from the fractional divider, it disadvantageously needs to be adapted for every charge pump setting. In short, implementation is difficult. The dynamic behavior of the compensation pump is critical given the small scale of the currents, which is greatly impacted by capacitive coupling issues. For example, the currents are around 20 nA switched for 1 .mu.s, and the compensation charge can be as low as 20 fC.
Hence, a primary disadvantage of the current methods is the difficulty associated with proper matching of the charge pumps. Another disadvantage concerns the difficulty in filtering the undesired frequency components. Yet another disadvantage is introduction of fractional charge into the spectral output, causing interference with neighboring channels.